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Feeds › Patents

Patents

New US patents granted to public companies.

About this data
What it is
The US Patent and Trademark Office (USPTO) grants new patents every Tuesday. We match the companies named as owners to public companies.
Who files it
The USPTO publishes each grant.
How current
Grants are published every Tuesday, and we collect them weekly.
Worth knowing
A patent count says little about how valuable the patents are. We match owners to companies automatically, so a few may be missed.

All of this comes from public filings.

Source and freshness · Information, not investment advice (disclaimer).

Patents granted per week, last 12 weeks

05,00010.0K15.0KAug 25 · Patents granted: 8,093Aug 25Sep 1 · Patents granted: 6,519Sep 1Sep 8 · Patents granted: 6,822Sep 8Sep 15 · Patents granted: 6,983Sep 15Sep 22 · Patents granted: 5,563Sep 22Sep 29 · Patents granted: 6,286Sep 29Oct 6 · Patents granted: 7,272Oct 6Oct 13 · Patents granted: 8,528Oct 13Oct 20 · Patents granted: 7,948Oct 20Oct 27 · Patents granted: 5,467Oct 27Nov 3 · Patents granted: 10,067Nov 3Nov 10 · Patents granted: 8,414Nov 10
05,00010.0K15.0KAug 25 · Patents granted: 8,093Aug 25Sep 1 · Patents granted: 6,519Sep 1Sep 8 · Patents granted: 6,822Sep 8Sep 15 · Patents granted: 6,983Sep 15Sep 22 · Patents granted: 5,563Sep 22Sep 29 · Patents granted: 6,286Sep 29Oct 6 · Patents granted: 7,272Oct 6Oct 13 · Patents granted: 8,528Oct 13Oct 20 · Patents granted: 7,948Oct 20Oct 27 · Patents granted: 5,467Oct 27Nov 3 · Patents granted: 10,067Nov 3Nov 10 · Patents granted: 8,414Nov 10

Latest patent grants

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Showing: ticker MU

Latest patent grants
GrantedPatentOwnerTypeSource
Nov 10, 202612796560
Terraced support structure to mitigate stacked die overhang deflection
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612796419
Vias and conductive routing layers in semiconductor substrates
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612796078
Apparatus including adjusted wells and methods of manufacturing the s…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795953
Semiconductor device with a through via between redistribution layers
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795949
Vertical 3D memory device and accessing method
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795939
Ferroelectric memory arrays with low permittivity dielectric barriers
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795936
Microelectronic devices, memory devices, and electronic systems
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795926
Microelectronic devices with source region vertically between tiered…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795919
Microelectronic devices with a tiered stack of conductive, insulative…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795918
Electronic devices including pillars including a memory material, and…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795916
Memory array having bridging material between adjacent memory blocks
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612795902
Memory array—periphery integration with split barrier metal stack
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612794856
Security configurations for zonal computing architecture
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612794718
Identity validation for proof of space
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612794588
Enhanced negative acknowledgment control frame
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612794456
Latch circuit with reduced propagation delay
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793807
Mixed-mode virtual block generation
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793806
Apparatuses and methods for redundancy information for memory with mu…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793804
Apparatus including BTI controller
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793801
Word line based program voltage adjustment
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793782
Multi-level cell and multi-sub-block programming in a memory device
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793778
Memory device including in-tier driver circuit
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793767
Signal routing between memory die and logic die for mode based operat…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793764
Memory with partial array density security, and associated systems, d…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793762
Adaptive refresh staggering
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793758
Fast background array pattern writing
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793750
Temperature differential-based voltage offset control
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612793749
Power hold-off circuit
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792736
Establishing a chain of ownership of a device
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792524
Page request interface support in handling host submission queues and…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792518
Memory sub-system aware prefetching in a disaggregated memory environ…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792515
Memory device to offload processing from an advanced driver assistanc…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792511
Systems for software optimization of data layout
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792508
Multi-pass programming for garbage collection
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792463
Apparatuses and methods for selectable expansion of error correction…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792460
Performing selective media management operations in a memory sub-syst…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792459
Handling read failure in zone memory system
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792457
Bit-shaping via linear block codes
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792456
Panic handling for memory systems
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792446
Initiating an emergency power shutdown of a memory device using senso…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792274
Data layout configurations for access operations
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792272
Apparatus with calibration input mechanism and methods for operating…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792271
Specifying media type in write commands
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792268
Memory devices including idle time prediction
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792260
Diagonal page mapping in memory systems
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792258
Error injection methods using soft post-package repair (sPPR) techniq…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792254
Modulation code permutation selection for data modulation in memory s…
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792246
Superblock comprising blocks determined based on piecewise slopes
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792245
Garbage collection based on data characteristics
MU
Micron Technology, Inc.
utilityGoogle Patents ↗
Nov 10, 202612792240
Adaptive control for in-memory versioning
MU
Micron Technology, Inc.
utilityGoogle Patents ↗

The newest 50 items, most recent first. Every row links to its original filing. Updated Nov 15, 2026, 4:33 PM EST.

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